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计算CMOS逻辑IC的功耗
根据以下两项计算功耗:
功率的计算是将电流乘以施加在IC上的电压。
静态功耗:PS
当CMOS逻辑处于静态(即当其输入电压几乎保持不变)时,除了流过内部反向偏置pn结的微小漏电流(称为静态供电电流,ICC)以外,几乎没有电流流动。静态功耗是将ICC乘以供电电压。
PS=VCC×ICC
VCC:施加在逻辑IC上的电压
ICC:如数据表所示的静态供电电流
动态功耗:PL+PPD
动态供电电流是指当输入在高电平和低电平之间转换时流过CMOS逻辑IC的电流。该电流在电容充放电过程中流动。必须同时考虑寄生电容(内部等效电容)和负载电容。
动态功耗是将动态供电电流乘以施加在p沟道或n沟道MOSFET上的电压。
为方便起见,以下计算将假定此电压等于VCC,此时动态供电电流最大。
负载电容(CL)引起的动态功耗:PL
PL指外部负载充电和放电时的功耗,如右图所示。
存储在负载电容上的电荷量(QL)计算如下:
QL=CL*VCC
CL:负载电容
设输出信号频率为fOUT(=1/TOUT)。则平均电流(IL)表示为:
IL=QL/T=CL * VCC * fOUT
因此,动态功耗(PL)为:
PL=VCC * IL=CL * VCC^2 * fOUT
如果一个IC有多个输出,其动态功耗可计算如下:
PL=VCC^2 * Σ(CLn* fOUTn)
内部等效电容引起的动态功耗(CPD):PPD
CMOS逻辑IC具有各种寄生电容,如右图所示。这些电容可等效地表示为CPD。(实际上,CPD的基于零负载条件下相对较高频率(1MHz)时的功耗计算得出的。)
PPD是IC的等效电容消耗的功率,可按与PL相同的方式考虑。
但请注意,PPD的计算是基于输入频率(fIN):
PPD=VCC * IL=CPD * VCC^2 * fIN
总功耗(PTTL)可以表示为静态功耗(PS)和动态功耗(PL+PPD)之和:
PTTL=PS+PL+PPD