What are the possible causes of noise in the voltage waveform input to the CMOS logic IC
如果CMOS逻辑IC的输入信号走线邻近另一个IC的输出信号走线，则可能会产生串扰噪声。检查输入信号走线附近是否有另一条走线或者两条走线相邻且平行。
通常可考虑采取以下对策：
- 在信号走线和相邻走线之间加设一根接地防护线，例如GND走线。
- 缩短与信号走线平行的走线的长度。
关于串扰的说明，请参阅《电路设计注意事项：逻辑IC》。
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FAQs
- Is a decoupling capacitor required for the supply of a general purpose logic IC?
- Is it possible to leave the unused inputs of the general purpose logic ICs open?
- Are there any problems with the input pins of CMOS logic ICs and the bus pins (input/output pins) of bidirectional bus buffers in a floating state?
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