In order to achieve a step-down (5 V → 3.3 V) and step-up (3.3 V → 5 V) level shift (voltage conversion), how should this be achieved?

Step-down (5 V→3.3 V) and step-up (3.3 V→5 V) voltage translation can be achieved by using a CMOS logic IC with tolerant function, single- or dual-supply level shifters (Buffer type), and dual-supply bus switches.

Fig. 1 Step-down voltage translation using an input-tolerant function
Fig. 1 Step-down voltage translation using an input-tolerant function

The following is a brief example.
For detailed selection methods, please use the following application notes.
→ Tips for Selecting Level Shifters(Voltage Translation ICs) (PDF:2.62MB)

Step-down voltage translation:
The input-tolerant function allows level shifting from a higher voltage to a lower voltage such as from 5 V to 3.3 V. For example, the input-tolerant function allows 5 V to be applied to an input without drawing extra current even when VCC = 0 V.(Fig. 1)

For step-down translation using the input-tolerant function of a CMOS logic IC, ensure that the maximum low-level input voltage is within the VIL range. (Table-1)

Table-1 Example of input specifications of a typical CMOS logic IC with a non-TTL input (74VHC240)

Table-1 Example of input specifications of a typical CMOS logic IC with a non-TTL input (74VHC240)

Fig. 2 Step-up voltage translation using a CMOS logic IC with a TTL
Fig. 2 Step-up voltage translation using a CMOS logic IC with a TTL

Step-up voltage translation:
Level shifting from a lower voltage to a higher voltage such as from 3.3 V to 5 V can be performed if the high-level output voltage (VOH) of the preceding IC satisfies the high-level input voltage (VIH) of level translation IC because VOH is almost equal to the supply voltage (VCC).
Since the minimum high-level input voltage (VIH) of typical CMOS logic ICs is specified as VCC × 0.7, VIH is 3.5 V when VCC = 5 V. Therefore, if the VOH of the preceding IC is 3.3 V, the minimum VIH of level translation IC is not satisfied. In this case, consider using a CMOS logic IC with a TTL input. (Fig. 2)

Table-2 shows the specifications of the TTL input of the 74HCT240. Since its minimum high-level input voltage (VIH) is 2.0 V, the 74HCT240 allows up translation from 3.3 V to 5 V

Table-2 Example of TTL input specifications of a CMOS logic IC (74VHCT240)

Table-2 Example of TTL input specifications of a CMOS logic IC (74VHCT240)

Fig. 3 Step-up voltage translation from 2.0 V to 5.0 V using a level shifter
Fig. 3 Step-up voltage translation from 2.0 V to 5.0 V using a level shifter

The 74VHCT240 cannot be used if the supply voltage of the preceding IC is lower than 2 V. In that case, it is necessary to use a level shifter (bus switch type: TC7MPB9326) as shown in Fig. 3 and Table-3.

Table-3 Supply voltage range of a level shifter (TC7MPB9326)

Table-3 Supply voltage range of a level shifter (TC7MPB9326)

Fig. 4 Level translation from 3.3 V to 5.0 V using Open-drain output product
Fig. 4 Level translation from 3.3 V to 5.0 V using Open-drain output product

There is also a method of Step-up voltage translation using a product with open drain output. Due to the pull-up resistor Rpull, the output swings to the VCC level. (Fig. 4)

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